Przestrzenie nazw | |
| namespace | GDT |
| namespace | Interr |
| namespace | RTC |
| namespace | Sysenter |
| namespace | Thread |
| namespace | WProtect |
Funkcje | |
| void | init () |
| proste operacje na sieci porozumiewa sie z pci32 by znalezc karte sieciowa 3c556 | |
| void | cpuid (uint32 input, uint32 *eax, uint32 *ebx, uint32 *ecx, uint32 *edx) |
| int | cpuid_isr (Interr::except2_t *code) |
| int | check_cpuid () |
| uint32 | cpuid_isr (struct except_t *code) |
| void | wrmsr (uint32 reg, uint64 val) |
| uint64 | rdmsr (uint32 reg) |
Zmienne | |
| uint32 volatile | cpuid_failure = 0 |
| uint32 volatile | cpuid_success = 0 |
| char | cpu_vendor_name [13] |
| uint32 | cpu_flags = 0 |
| uint32 | cpu_signature |
| const uint32 | CPU_SEP = 0x0800 |
| const uint32 | CPU_TCS = 0x0010 |
| const uint32 | SYSENTER_CS_MSR = 0x174 |
| const uint32 | SYSENTER_ESP_MSR = 0x175 |
| const uint32 | SYSENTER_EIP_MSR = 0x176 |
| int Arch::x86::check_cpuid | ( | ) |
Definicja w linii 98 pliku cpuid.cpp.
Odwołuje się do Arch::x86::Interr::add2interr_chain(), cpuid_failure, cpuid_isr(), Arch::x86::Interr::del_chainHdl(), EINVAL, ESUCCESS i Arch::x86::Interr::INT_OPCODE.
Odwołania w Net::init().
| uint32 Arch::x86::cpuid_isr | ( | struct except_t * | code | ) |
| int Arch::x86::cpuid_isr | ( | Interr::except2_t * | code | ) |
Definicja w linii 85 pliku cpuid.cpp.
Odwołuje się do cpuid_failure, Arch::x86::Interr::except2_t::eip i ESUCCESS.
Odwołania w check_cpuid().
| void Arch::x86::init | ( | ) |
proste operacje na sieci porozumiewa sie z pci32 by znalezc karte sieciowa 3c556
ustawienie timera ktory seeduje linear congruential generator DEF_SECOND/32 na sekunde i czeka na pierwsze seedowanie. w momencie gdy rtc timer pracuje, malo mozliwe jest by parzystosc rdtsc() zmieniala sie miedzy wywolaniami rdtsc_runner() w przewidywalny sposob
Definicja w linii 38 pliku cpuid.cpp.
Odwołania w main().
| const uint32 Arch::x86::CPU_SEP = 0x0800 |
| const uint32 Arch::x86::CPU_TCS = 0x0010 |
| uint32 volatile Arch::x86::cpuid_failure = 0 |
| uint32 volatile Arch::x86::cpuid_success = 0 |
| const uint32 Arch::x86::SYSENTER_CS_MSR = 0x174 |
| const uint32 Arch::x86::SYSENTER_EIP_MSR = 0x176 |
| const uint32 Arch::x86::SYSENTER_ESP_MSR = 0x175 |
1.5.6