00001 /* define for src/arch/x86/irq.cpp */ 00002 00003 #ifndef _CORE_ARCH_X86_IRQ_HPP 00004 #define _CORE_ARCH_X86_IRQ_HPP 00005 00006 namespace Arch { 00007 namespace x86 { 00008 namespace Interr { 00009 00010 00011 void init_pic(); //initialise programmable interrupt controller 00012 00013 const uint32 DEF_FIRST_IRQ_M_INT = 0x20; 00014 const uint32 DEF_FIRST_IRQ_S_INT = 0x28; 00015 const uint32 DEF_ICW1 = 0x11; 00016 const uint32 DEF_ICW4 = 1; 00017 const uint32 DEF_PIC_M_PORT = 0x20; 00018 const uint32 DEF_PIC_S_PORT = 0xA0; 00019 00020 00021 class pic_service 00022 { 00023 idt_service *idt; 00024 public: 00025 void init(idt_service *_idt); 00026 00027 // pic_service(idt_service *_idt); 00028 // pic_service(); 00029 void set_idt(idt_service *_idt); 00030 // ~pic_service(); 00031 void setup_pic (char first_irq1, char first_irq2); 00032 char get_irq_mask_m(); 00033 char get_irq_mask_s(); 00034 void mask(char intno, char enabled); 00035 void mask_irq_m(char); 00036 void mask_irq_s(char); 00037 uint32 install_irq(char, int (*proc)(except2_t*), short); 00038 void EOI(); 00039 void set_pit_freq(float hz); 00040 }; 00041 00042 extern pic_service kernel_pic; //kernel's pic management 00043 00044 00045 }; /*namespace Interr*/ 00046 }; /*namespace x86*/ 00047 }; /*namespace Arch*/ 00048 00049 #endif