00001 /* define for src/arch/x86/interr.cpp */ 00002 00003 #ifndef _CORE_ARCH_X86_INTERR_HPP 00004 #define _CORE_ARCH_X86_INTERR_HPP 00005 00006 namespace Arch { 00007 namespace x86 { 00008 namespace Interr { 00009 00010 #include "src/common/types.hpp" 00011 00012 void init(); 00013 00014 const uint32 DEF_INTERRUPT_COUNT= 0x100; /*how many ints in our table*/ 00015 const uint32 DEF_INT_FLAGS = 0x8e00; /*default flags for ints*/ 00016 const uint32 DEF_DOUBLE_FAULT = 0x08; /*the double fault code*/ 00017 00018 struct struct_idt 00019 { 00020 short s_offset0_15; 00021 short s_selector; 00022 short s_flags; 00023 short s_offset16_31; 00024 }; 00025 00026 struct struct_idtr 00027 { 00028 short s_limit; 00029 struct_idt *s_base; 00030 } __attribute__ ((packed)); 00031 00032 class idt_service 00033 { 00034 public: 00035 struct_idt *idt; 00036 struct_idtr *idtr; 00037 00038 // idt_service(); 00039 // ~idt_service(); 00040 00041 void set_int(char intno, void (offset)(), short select, short flags); 00042 void install_except(void (_exc)()); 00043 void lidt(); 00044 void sti(); 00045 void cli(); 00046 }; 00047 00048 extern class idt_service kernel_idt; /*idt management*/ 00049 00050 //this notates a pusha + push *s stack dump 00051 struct reg_dump 00052 { 00053 uint32 r_gs; 00054 uint32 r_fs; 00055 uint32 r_es; 00056 uint32 r_ds; 00057 00058 uint32 r_edi; 00059 uint32 r_esi; 00060 uint32 r_ebp; 00061 uint32 r_temp_esp; /*this pool will be unused by the scheduler*/ 00062 uint32 r_ebx; 00063 uint32 r_edx; 00064 uint32 r_ecx; 00065 uint32 r_eax; 00066 }; 00067 00068 00069 00070 }; /*namespace Interr*/ 00071 }; /*namespace x86*/ 00072 }; /*namespace Arch*/ 00073 00074 #endif